Instruction-level Parallelism in Asynchronous Processor Architectures
نویسنده
چکیده
The Micronet-based Asynchronous Processor (MAP) is a family of processor architectures based on the micronet model of asynchronous control. Micronets distribute the control amongst the functional units which enables the exploitation of ne-grained concurrency, both between and within program instructions. This paper introduces the mi-cronet model and evaluates the performance of micronet-based datapaths using behavioural simulations.
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تاریخ انتشار 1994